G.1: xHCI bulk-endpoint stall recovery (per F.14), built + verified
Full BOT-spec stall recovery per FABRIC-3.md F.14: new STALL_ERROR handling, Reset Endpoint + Set TR Dequeue Pointer commands, CLEAR_FEATURE(ENDPOINT_HALT), escalating to Bulk-Only Mass Storage Reset, capped retries (XHCI_BOT_STALL_MAX_RECOVERIES=2) mirroring bot_tur_retries, clean terminal failure via xhci_stall_fail(). Purely additive recovery path off the non-success transfer-event branch; the normal path is unchanged. Builds clean on amd64/aarch64/riscv64. QEMU amd64 boot regression passes: zero stalls, BOT attach (READ CAPACITY10 -> READ10 -> home-blocks) completes, normal-path xHCI trace identical to baseline. Live stall injection is not provable under qemu-xhci; deferred to v2.5.0 hardware. FABRIC-3.md G.1 documented; ROADMAP release-versioning policy folded in.
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@@ -72,7 +72,9 @@ typedef struct {
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XHCI_CONN_AWAIT_ENABLE_SLOT,
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XHCI_CONN_AWAIT_ADDRESS_DEVICE,
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XHCI_CONN_AWAIT_DISABLE_SLOT,
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XHCI_CONN_AWAIT_CONFIGURE_ENDPOINT
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XHCI_CONN_AWAIT_CONFIGURE_ENDPOINT,
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XHCI_CONN_AWAIT_RESET_ENDPOINT,
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XHCI_CONN_AWAIT_SET_TR_DEQUEUE
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} connect_state;
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uint32_t pending_connect_slot_id;
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/* Milestone 2e/2g: disconnect teardown. Same single-outstanding-
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@@ -117,7 +119,9 @@ typedef struct {
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XHCI_XFER_CBW_SENT,
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XHCI_XFER_BOT_DATA_IN,
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XHCI_XFER_BOT_DATA_OUT,
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XHCI_XFER_CSW_RECEIVED
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XHCI_XFER_CSW_RECEIVED,
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XHCI_XFER_CLEAR_HALT,
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XHCI_XFER_BOT_RESET
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} transfer_purpose;
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uint32_t pending_transfer_slot_id;
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uint8_t device_descriptor[18];
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@@ -241,6 +245,34 @@ typedef struct {
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uint32_t bot_cap_last_lba;
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uint32_t bot_cap_block_size;
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/* Milestone 2 / G.1 / §F.14: bulk-endpoint stall recovery. A bulk
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* transfer that completes with XHCI_COMPLETION_CODE_STALL_ERROR leaves
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* the xHC endpoint in the Halted state and the device endpoint in its
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* own halt; neither can drive new transfers until explicitly cleared.
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* This driver runs exactly one bulk transfer at a time, so a single
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* recovery thread driven by bot_stall_recoveries + the stall_* fields
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* below fully describes the recovery — there is no concurrency to
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* serialize. The recovery itself is the BOT-spec standard sequence:
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* xHCI Reset Endpoint -> Set TR Dequeue Pointer -> USB
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* CLEAR_FEATURE(ENDPOINT_HALT), escalating to a Bulk-Only Mass Storage
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* Reset + CLEAR_FEATURE on both bulk endpoints on a repeated stall,
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* then the original command stage is retried from scratch. The two
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* xHCI command steps are correlated via connect_state's two new
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* AWAIT_ values; the CLEAR_FEATURE / BOT-reset control transfers are
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* correlated via transfer_purpose's two new XHCI_XFER_* values; the
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* deferred issue + final re-issue ride next_action's two new
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* XHCI_NEXT_ACTION_* values — see xhci_poll_events()'s completion
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* handlers for the state machine that consumes these. */
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uint32_t bot_stall_recoveries; /* full recoveries performed for the
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current command chain, capped at
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XHCI_BOT_STALL_MAX_RECOVERIES */
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uint32_t stall_dci; /* Device Context Index of the stalled bulk ep */
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uint8_t stall_ep_addr; /* bEndpointAddress (bit7=dir) of the stalled bulk ep */
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uint8_t bot_reset_clear_remaining; /* CLEAR_FEATUREs still owed in a
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BOT-reset escalation (2 = both eps) */
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uint32_t stall_retry_action; /* XHCI_NEXT_ACTION_* stage to re-issue once
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recovery completes */
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/* Milestone 2h: set by the SET_CONFIGURATION completion handler
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* (inside xhci_poll_events()'s own call frame, so it only sets a flag
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* -- no doorbell ring, no xhci_bot_wait_for_idle() call, both unsafe
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@@ -296,7 +328,9 @@ typedef struct {
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XHCI_NEXT_ACTION_BOT_SEND_TUR,
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XHCI_NEXT_ACTION_BOT_SEND_READ10,
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XHCI_NEXT_ACTION_BOT_SEND_READ_CAPACITY10,
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XHCI_NEXT_ACTION_BOT_SEND_WRITE10
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XHCI_NEXT_ACTION_BOT_SEND_WRITE10,
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XHCI_NEXT_ACTION_CLEAR_HALT,
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XHCI_NEXT_ACTION_BOT_RESET
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} next_action;
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uint32_t next_action_slot_id;
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uint16_t next_action_length;
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@@ -468,6 +502,52 @@ int xhci_cmd_address_device(xhci_dev_t *dev, uint32_t slot_id,
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*/
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int xhci_cmd_configure_endpoint(xhci_dev_t *dev, uint32_t slot_id);
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/*
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* xhci_cmd_reset_endpoint — submit a Reset Endpoint command TRB for
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* slot_id's endpoint `ep_id` (a bEndpointAddress,
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* bit 7 = direction). Transitions that endpoint
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* from the Halted state back to Stopped in the
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* xHC's internal context — the xHCI-level first
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* step of G.1 / §F.14 stall recovery, mirroring
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* xhci_cmd_disable_slot()'s shape exactly (submit,
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* ring doorbell 0, don't wait). The device-side
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* halt is cleared separately by
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* xhci_ep0_clear_endpoint_halt() once the two
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* xHCI command steps (Reset Endpoint, then Set TR
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* Dequeue Pointer) have completed.
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*
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* Called from xhci_poll_events()'s transfer-event STALL handler -- not
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* called directly by other code.
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*
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* Returns 0 if the command was posted, -1 if dev/dev->cmd_ring is not set
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* up.
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*/
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int xhci_cmd_reset_endpoint(xhci_dev_t *dev, uint32_t slot_id, uint32_t ep_id);
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/*
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* xhci_cmd_set_tr_dequeue_pointer — submit a Set TR Dequeue Pointer command
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* TRB for slot_id's endpoint ep_id,
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* repositioning its Transfer Ring's
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* dequeue pointer to `new_dequeue` (a
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* pointer into the ring, e.g. the ring's
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* current producer slot) with cycle state
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* `dcs`. The xHCI-level second step of
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* G.1 / §F.14 stall recovery: after Reset
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* Endpoint has un-halted the ring, this
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* tells the controller where to resume /
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* discard from so a freshly enqueued TRB
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* is consumed cleanly.
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*
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* Called from xhci_poll_events()'s command-completion handler once Reset
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* Endpoint succeeds -- not called directly by other code.
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*
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* Returns 0 if the command was posted, -1 if dev/dev->cmd_ring is not set
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* up.
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*/
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int xhci_cmd_set_tr_dequeue_pointer(xhci_dev_t *dev, uint32_t slot_id,
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uint32_t ep_id, uint64_t new_dequeue,
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uint32_t dcs);
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/*
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* xhci_bot_send_read10 — build a Command Block Wrapper for a SCSI
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* READ(10) and submit it on the bulk OUT Transfer
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@@ -816,4 +896,54 @@ int xhci_ep0_get_config_descriptor(xhci_dev_t *dev, uint32_t slot_id, uint16_t l
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*/
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int xhci_ep0_set_configuration(xhci_dev_t *dev, uint32_t slot_id, uint8_t config_value);
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/*
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* xhci_ep0_clear_endpoint_halt — issue a CLEAR_FEATURE(ENDPOINT_HALT)
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* standard control request (Setup + Status
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* only, no Data stage, via the existing
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* xhci_ep0_control_write_nodata() machinery)
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* with wValue = ENDPOINT_HALT and wIndex =
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* ep_addr. This is the USB-level step of
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* G.1 / §F.14 stall recovery that clears
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* the *device's* own halt condition (and
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* resets its data toggle), so the endpoint
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* will actually drive new transfers after
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* the xHC-side Reset Endpoint + Set TR
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* Dequeue Pointer commands have run.
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* Sets transfer_purpose = XHCI_XFER_CLEAR_HALT
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* so xhci_poll_events() can complete the
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* recovery and re-issue the stalled command.
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*
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* Called from xhci_poll_events()'s deferred next_action dispatch (the
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* XHCI_NEXT_ACTION_CLEAR_HALT branch, which may run it more than once in a
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* BOT-Reset escalation to clear both bulk endpoints) -- not called directly
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* by other code.
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*
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* Returns 0 if the transfer was posted, -1 if dev/dev->ep0_ring is not set
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* up.
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*/
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int xhci_ep0_clear_endpoint_halt(xhci_dev_t *dev, uint32_t slot_id, uint8_t ep_addr);
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/*
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* xhci_ep0_bot_mass_storage_reset — issue the Bulk-Only Transport class
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* request Mass Storage Reset
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* (bmRequestType = 0x21 class/interface,
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* bRequest = 0xFF, no Data stage, again via
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* the existing xhci_ep0_control_write_nodata()
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* machinery). The escalation step of G.1 /
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* §F.14 stall recovery: BOT spec section
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* 5.3.4's full reset of a wedged command
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* sequence, followed by
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* xhci_ep0_clear_endpoint_halt() on *both*
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* bulk endpoints before the original
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* command is retried from scratch. Sets
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* transfer_purpose = XHCI_XFER_BOT_RESET.
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*
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* Called from xhci_poll_events()'s deferred next_action dispatch (the
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* XHCI_NEXT_ACTION_BOT_RESET branch) -- not called directly by other code.
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*
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* Returns 0 if the transfer was posted, -1 if dev/dev->ep0_ring is not set
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* up.
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*/
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int xhci_ep0_bot_mass_storage_reset(xhci_dev_t *dev, uint32_t slot_id);
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#endif /* STARKERNEL_XHCI_DRIVER_H */
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