riscv64: PLIC bring-up, external-interrupt substrate (item 4.3.5b)

Punch list §25 item 4.3.5b complete.

sie.SEIE enabled, PLIC threshold/claim/complete wired into the trap
handler. Verified with a UART-loopback synthetic interrupt (PLIC has no
software set-pending register, unlike GICv2): claim_count=1, last_irq=10,
IIR confirms genuine receive-data cause, byte matched exactly. Self-test
code run once for evidence then fully reverted, per Captain Bob's ruling;
only the permanent substrate remains, no source enabled by default.
Three-arch acceptance boot clean, zero exceptions.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
2026-08-08 11:24:47 -04:00
co-authored by Claude Sonnet 5
parent 36965cf812
commit 5f4df673c1
19 changed files with 73317 additions and 88 deletions
+30 -30
View File
@@ -59,37 +59,37 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,9,65536,0,0,65536,0,0
2,20000,10000,0,0,78,10,7,4096,0,0,0,10,65536,0,0,65536,0,0
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
3,30000,10000,0,0,101,13,7,4096,0,0,0,12,65536,0,0,65536,0,0
4,40000,10000,0,0,63,19,8,4096,0,0,0,13,65536,0,0,65536,0,0
5,50000,10000,0,0,92,25,8,4096,2,0,0,15,65536,0,0,65536,0,0
6,60000,10000,0,0,64,27,8,4096,2,0,0,16,65536,0,0,65536,0,0
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
8,80000,10000,0,0,256,34,9,4096,466,0,0,28,65536,0,0,65536,0,0
9,90000,10000,0,0,256,36,10,4096,722,0,0,34,65536,0,0,65536,0,0
10,100000,10000,0,0,256,36,11,4096,978,0,0,40,65536,0,0,65536,0,0
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8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
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35,350000,10000,0,0,256,45,28,256,256,0,0,200,65536,0,1,65536,0,0
36,360000,10000,0,0,256,45,29,256,256,0,0,206,65536,0,1,65536,0,0
1 tick_number elapsed_ns tick_interval_ns cache_hits_delta bucket_hits_delta word_executions_delta hot_word_count avg_word_heat_q48 window_width actual_window_size predicted_label_hits jitter_bits apic_ticks time_trust_q48 variance_q48 vm_call_depth_max hera_heat_q48 hermes_heat_q48 artemis_heat_q48
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61 2 20000 10000 0 0 78 10 7 4096 0 0 0 10 65536 0 0 65536 0 0
62 3 30000 10000 0 0 101 13 7 4096 0 0 0 11 12 65536 0 0 65536 0 0
63 4 40000 10000 0 0 63 19 8 4096 0 0 0 12 13 65536 0 0 65536 0 0
64 5 50000 10000 0 0 92 25 8 4096 2 0 0 15 65536 0 0 65536 0 0
65 6 60000 10000 0 0 64 27 8 4096 2 0 0 16 65536 0 0 65536 0 0
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71 12 120000 10000 0 0 256 36 12 4096 1490 0 0 53 54 65536 0 0 65536 0 0
72 13 130000 10000 0 0 256 37 12 4096 1746 0 0 59 60 65536 0 0 65536 0 0
73 14 140000 10000 0 0 230 39 12 4096 1949 0 0 65 66 65536 0 0 65536 0 0
74 15 150000 10000 0 0 256 39 13 4096 2204 0 0 71 73 65536 0 0 65536 0 0
75 16 160000 10000 0 0 256 39 14 4096 2459 0 0 78 79 65536 0 0 65536 0 0
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79 20 200000 10000 0 0 256 41 17 4096 3480 0 0 103 104 65536 0 1 65536 0 0
80 21 210000 10000 0 0 256 41 17 4096 3736 0 0 109 110 65536 0 1 65536 0 0
81 22 220000 10000 0 0 256 41 18 4096 3992 0 0 117 118 65536 0 1 65536 0 0
82 23 230000 10000 0 0 256 41 19 4096 4096 0 0 124 125 65536 0 1 65536 0 0
83 24 240000 10000 0 0 256 41 20 4096 4096 0 0 130 131 65536 0 1 65536 0 0
84 25 250000 10000 0 0 256 43 20 2048 2048 0 0 136 137 65536 0 1 65536 0 0
85 26 260000 10000 0 0 256 45 21 2048 2048 0 0 143 65536 0 1 65536 0 0
86 27 270000 10000 0 0 256 45 22 1024 1024 0 0 149 150 65536 0 1 65536 0 0
87 28 280000 10000 0 0 256 45 23 1024 1024 0 0 155 156 65536 0 1 65536 0 0
88 29 290000 10000 0 0 256 45 24 512 512 0 0 161 162 65536 0 1 65536 0 0
89 30 300000 10000 0 0 256 45 24 512 512 0 0 168 65536 0 1 65536 0 0
90 31 310000 10000 0 0 256 45 25 256 256 0 0 174 175 65536 0 1 65536 0 0
91 32 320000 10000 0 0 255 45 26 256 256 0 0 180 181 65536 0 1 65536 0 0
92 33 330000 10000 0 0 256 45 27 256 256 0 0 186 187 65536 0 1 65536 0 0
93 34 340000 10000 0 0 256 45 27 256 256 0 0 192 193 65536 0 1 65536 0 0
94 35 350000 10000 0 0 256 45 28 256 256 0 0 199 200 65536 0 1 65536 0 0
95 36 360000 10000 0 0 256 45 29 256 256 0 0 205 206 65536 0 1 65536 0 0