riscv64: PLIC bring-up, external-interrupt substrate (item 4.3.5b)

Punch list §25 item 4.3.5b complete.

sie.SEIE enabled, PLIC threshold/claim/complete wired into the trap
handler. Verified with a UART-loopback synthetic interrupt (PLIC has no
software set-pending register, unlike GICv2): claim_count=1, last_irq=10,
IIR confirms genuine receive-data cause, byte matched exactly. Self-test
code run once for evidence then fully reverted, per Captain Bob's ruling;
only the permanent substrate remains, no source enabled by default.
Three-arch acceptance boot clean, zero exceptions.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
2026-08-08 11:24:47 -04:00
co-authored by Claude Sonnet 5
parent 36965cf812
commit 5f4df673c1
19 changed files with 73317 additions and 88 deletions
+9 -9
View File
@@ -73,23 +73,23 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
14,140000,10000,0,0,230,39,12,4096,1949,0,0,73,65536,0,0,65536,0,0
15,150000,10000,0,0,256,39,13,4096,2204,0,0,80,65536,0,0,65536,0,0
16,160000,10000,0,0,256,39,14,4096,2459,0,0,87,65536,0,0,65536,0,0
17,170000,10000,0,0,256,39,15,4096,2713,0,0,94,65536,0,0,65536,0,0
17,170000,10000,0,0,256,39,15,4096,2713,0,0,95,65536,0,0,65536,0,0
18,180000,10000,0,0,256,39,15,4096,2969,0,0,102,65536,0,0,65536,0,0
19,190000,10000,0,0,256,39,16,4096,3224,0,0,111,65536,0,1,65536,0,0
19,190000,10000,0,0,256,39,16,4096,3224,0,0,112,65536,0,1,65536,0,0
20,200000,10000,0,0,256,41,17,4096,3480,0,0,119,65536,0,1,65536,0,0
21,210000,10000,0,0,256,41,17,4096,3736,0,0,126,65536,0,1,65536,0,0
22,220000,10000,0,0,256,41,18,4096,3992,0,0,133,65536,0,1,65536,0,0
22,220000,10000,0,0,256,41,18,4096,3992,0,0,134,65536,0,1,65536,0,0
23,230000,10000,0,0,256,41,19,4096,4096,0,0,141,65536,0,1,65536,0,0
24,240000,10000,0,0,256,41,20,4096,4096,0,0,148,65536,0,1,65536,0,0
24,240000,10000,0,0,256,41,20,4096,4096,0,0,149,65536,0,1,65536,0,0
25,250000,10000,0,0,256,43,20,2048,2048,0,0,156,65536,0,1,65536,0,0
26,260000,10000,0,0,256,45,21,2048,2048,0,0,163,65536,0,1,65536,0,0
27,270000,10000,0,0,256,45,22,1024,1024,0,0,170,65536,0,1,65536,0,0
27,270000,10000,0,0,256,45,22,1024,1024,0,0,171,65536,0,1,65536,0,0
28,280000,10000,0,0,256,45,23,1024,1024,0,0,178,65536,0,1,65536,0,0
29,290000,10000,0,0,256,45,24,512,512,0,0,185,65536,0,1,65536,0,0
29,290000,10000,0,0,256,45,24,512,512,0,0,186,65536,0,1,65536,0,0
30,300000,10000,0,0,256,45,24,512,512,0,0,193,65536,0,1,65536,0,0
31,310000,10000,0,0,256,45,25,256,256,0,0,200,65536,0,1,65536,0,0
32,320000,10000,0,0,255,45,26,256,256,0,0,207,65536,0,1,65536,0,0
33,330000,10000,0,0,256,45,27,256,256,0,0,216,65536,0,1,65536,0,0
32,320000,10000,0,0,255,45,26,256,256,0,0,208,65536,0,1,65536,0,0
33,330000,10000,0,0,256,45,27,256,256,0,0,217,65536,0,1,65536,0,0
34,340000,10000,0,0,256,45,27,256,256,0,0,224,65536,0,1,65536,0,0
35,350000,10000,0,0,256,45,28,256,256,0,0,231,65536,0,1,65536,0,0
35,350000,10000,0,0,256,45,28,256,256,0,0,232,65536,0,1,65536,0,0
36,360000,10000,0,0,256,45,29,256,256,0,0,239,65536,0,1,65536,0,0
1 tick_number elapsed_ns tick_interval_ns cache_hits_delta bucket_hits_delta word_executions_delta hot_word_count avg_word_heat_q48 window_width actual_window_size predicted_label_hits jitter_bits apic_ticks time_trust_q48 variance_q48 vm_call_depth_max hera_heat_q48 hermes_heat_q48 artemis_heat_q48
73 14 140000 10000 0 0 230 39 12 4096 1949 0 0 73 65536 0 0 65536 0 0
74 15 150000 10000 0 0 256 39 13 4096 2204 0 0 80 65536 0 0 65536 0 0
75 16 160000 10000 0 0 256 39 14 4096 2459 0 0 87 65536 0 0 65536 0 0
76 17 170000 10000 0 0 256 39 15 4096 2713 0 0 94 95 65536 0 0 65536 0 0
77 18 180000 10000 0 0 256 39 15 4096 2969 0 0 102 65536 0 0 65536 0 0
78 19 190000 10000 0 0 256 39 16 4096 3224 0 0 111 112 65536 0 1 65536 0 0
79 20 200000 10000 0 0 256 41 17 4096 3480 0 0 119 65536 0 1 65536 0 0
80 21 210000 10000 0 0 256 41 17 4096 3736 0 0 126 65536 0 1 65536 0 0
81 22 220000 10000 0 0 256 41 18 4096 3992 0 0 133 134 65536 0 1 65536 0 0
82 23 230000 10000 0 0 256 41 19 4096 4096 0 0 141 65536 0 1 65536 0 0
83 24 240000 10000 0 0 256 41 20 4096 4096 0 0 148 149 65536 0 1 65536 0 0
84 25 250000 10000 0 0 256 43 20 2048 2048 0 0 156 65536 0 1 65536 0 0
85 26 260000 10000 0 0 256 45 21 2048 2048 0 0 163 65536 0 1 65536 0 0
86 27 270000 10000 0 0 256 45 22 1024 1024 0 0 170 171 65536 0 1 65536 0 0
87 28 280000 10000 0 0 256 45 23 1024 1024 0 0 178 65536 0 1 65536 0 0
88 29 290000 10000 0 0 256 45 24 512 512 0 0 185 186 65536 0 1 65536 0 0
89 30 300000 10000 0 0 256 45 24 512 512 0 0 193 65536 0 1 65536 0 0
90 31 310000 10000 0 0 256 45 25 256 256 0 0 200 65536 0 1 65536 0 0
91 32 320000 10000 0 0 255 45 26 256 256 0 0 207 208 65536 0 1 65536 0 0
92 33 330000 10000 0 0 256 45 27 256 256 0 0 216 217 65536 0 1 65536 0 0
93 34 340000 10000 0 0 256 45 27 256 256 0 0 224 65536 0 1 65536 0 0
94 35 350000 10000 0 0 256 45 28 256 256 0 0 231 232 65536 0 1 65536 0 0
95 36 360000 10000 0 0 256 45 29 256 256 0 0 239 65536 0 1 65536 0 0