riscv64: virtio-keyboard-pci, interrupt-driven keyboard input (item 4.3.5c)
Punch list §25 item 4.3.5c complete. Amended from a nonexistent MMIO transport to PCI (matching the board's actual virtio-blk-pci precedent). New virtio-input driver: eventq with pre-posted buffers, PLIC source computed at runtime from PCI slot/pin (derived live from this host's QEMU riscv64 DTB), mandatory ISR-status read, PCI interrupt-disable-bit check. New VKBD-EVENT/VKBD-DEBUG FORTH words. Verified with a real QEMU sendkey keypress: exact KEY_A/press match, two real interrupts serviced, zero exceptions. Three-arch acceptance boot clean. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
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co-authored by
Claude Sonnet 5
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5f4df673c1
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8251aebcf8
@@ -31,11 +31,15 @@
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#define PCI_CFG_BAR5 0x24
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#define PCI_CFG_CAP_PTR 0x34
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#define PCI_CFG_INT_LINE 0x3C
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#define PCI_CFG_INT_PIN 0x3D /* 0=none, 1=INTA .. 4=INTD (item 4.3.5c/4.3.5d) */
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/* PCI command register bits */
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#define PCI_CMD_IO_SPACE (1u << 0)
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#define PCI_CMD_MEM_SPACE (1u << 1)
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#define PCI_CMD_BUS_MASTER (1u << 2)
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#define PCI_CMD_INTX_DISABLE (1u << 10) /* item 4.3.5c/4.3.5e: pci_enable() never
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* clears this -- if firmware left it set,
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* INTx never asserts. Check explicitly. */
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/* BAR type flags */
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#define PCI_BAR_TYPE_MASK 0x1u
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