rpi5_dtb.c: wire fdt.c's node-scoped lookup into the Pi 5 UART/mailbox addresses
New include/starkernel/rpi5_dtb.h / src/starkernel/arch/aarch64/rpi5_dtb.c:
rpi5_uart_base()/rpi5_mailbox_base(), each finding their peripheral by
compatible string ("arm,pl011" / "brcm,bcm2835-mbox") via fdt_find_node_by_
compatible() then reading its "reg" via fdt_find_prop_in_node().
Found and fixed a real translation gap before it could have silently
produced a wrong address: confirmed directly against bcm2712.dtsi
(raspberrypi/linux) that both peripherals live under one "soc"
simple-bus node whose ranges property adds a fixed 0x10_0000_0000
offset to every child reg value. fdt.c's reader deliberately doesn't
apply ranges translation generally (not a general devicetree
library); this file applies that one, fixed, SoC-wide offset
explicitly, documented with the exact devicetree excerpt that
confirmed it.
Compile-only verification -- no caller wired in yet, these two
functions are what the still-open entry-stub and mailbox-framebuffer-
driver punch-list items will call. Verified 3-arch boot to ok>
(amd64/aarch64/riscv64, each in the foreground; rpi5_dtb.o confirmed
built on aarch64, the only arch that compiles this file).
Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019YcT3H2PQeyujrzjqS3Var
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co-authored by
Claude Sonnet 5
parent
5e46f18fd9
commit
ca52ce8243
+18
-4
@@ -318,15 +318,29 @@ blocker for free.
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the crux of why most of M1–M9 stays shared.
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3. **Mailbox-property-interface framebuffer driver** — genuinely new code (§IV.1's own
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assessment), populating `BootInfo.framebuffer` the same shape UEFI GOP currently does, so
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`console.c`/`vt100.c`/`framebuffer.c` need no changes at all downstream.
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`console.c`/`vt100.c`/`framebuffer.c` need no changes at all downstream. **The address
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lookup half is now done** — see item 4a below; the mailbox message-protocol half (framing
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a real property-tag request/response over the discovered base address) is still open.
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4. **`fdt.c`/`fdt.h` extension — DONE 2026-09-04.** Added `fdt_find_node_by_compatible()`
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(matches any entry in a node's NUL-separated `compatible` list, first match in document
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order) and `fdt_find_prop_in_node()` (scoped to that one node's own direct properties only
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— stops at the first child node or the node's own end, never descends or continues into a
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sibling). Same minimal, non-tree-building style as the existing reader — no new state, no
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allocation, one linear scan per call. Verified 3-arch boot to `ok>` (compile-only — no
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caller wired in yet; this is the shared primitive items 1/3 above and §V.3 item 3 below
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will each call once built).
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allocation, one linear scan per call. Verified 3-arch boot to `ok>`.
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**4a. UART + mailbox address lookup — DONE 2026-09-04.** New
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`include/starkernel/rpi5_dtb.h` / `src/starkernel/arch/aarch64/rpi5_dtb.c`:
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`rpi5_uart_base()`/`rpi5_mailbox_base()`, each `fdt_find_node_by_compatible()` (`"arm,pl011"`
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/ `"brcm,bcm2835-mbox"`) → `fdt_find_prop_in_node(..., "reg", ...)`. **A real translation
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gap found and fixed before this could have been silently wrong**: confirmed directly
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against `bcm2712.dtsi` (raspberrypi/linux) that both peripherals live under one `soc`
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simple-bus node whose `ranges` property adds a fixed `0x10_0000_0000` offset to every
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child `reg` value — `fdt.c`'s reader deliberately does not apply `ranges` translation
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generally (not a general devicetree library), so this file applies that one, fixed,
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SoC-wide offset explicitly by name (`BCM2712_SOC_RANGES_OFFSET`), documented with the exact
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devicetree excerpt that confirmed it. Verified 3-arch boot to `ok>` (compile-only — these
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two functions have no caller yet; that's the entry-stub/framebuffer-driver items above,
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still open).
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5. **`pci_init()` DTB path**: a devicetree-based alternative for RP1 discovery, since
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`boot_info->acpi_table` will be `NULL` on this path and RP1 is PCIe-attached, not directly
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memory-mapped.
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