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FABRIC.md: item 4.5d -- arch_relax() tested against the PM Timer stall, disproven

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Follow-up probing narrowed Finding 3's behavior (inconsistent stall point
run-to-run: sometimes reaches iters=1000/delta=951 before stopping,
sometimes never gets past iters=0 even after a 400-second bounded wait) but
didn't pin the mechanism.

Tested the strongest available hypothesis: single-threaded TCG scheduling
starvation from an -O2-tightened spin loop, based on a real precedent --
calibrate_apic_timer() (apic.c) already calls arch_relax() every iteration
of its own spin-wait; calibrate_tsc_with_pmtimer() never had it. Added the
same call, matching that precedent exactly. Result: no change, same exact
stall point on a fresh 60-second bounded wait. Reverted.

Stopping here per this document's own §25.0 rule 5 -- root-causing further
needs either deeper TCG/QEMU internals knowledge or a different diagnostic
approach (host-side instrumentation) than another guess-and-check pass.
Makefile.starkernel and timer.c both back to committed -O0 state, confirmed
booting clean.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
2026-08-11 11:35:09 -04:00
co-authored by Claude Sonnet 5
parent 7df2e1bae3
commit dd09de65f5
10 changed files with 18655 additions and 37 deletions
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experiments/bare_metal/latest/amd64.csv
+36 -36
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@@ -72,39 +72,39 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
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1 tick_number elapsed_ns tick_interval_ns cache_hits_delta bucket_hits_delta word_executions_delta hot_word_count avg_word_heat_q48 window_width actual_window_size predicted_label_hits jitter_bits apic_ticks time_trust_q48 variance_q48 vm_call_depth_max hera_heat_q48 hermes_heat_q48 artemis_heat_q48
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105 31 310000 10000 0 0 256 45 25 256 256 0 0 178 176 65536 0 1 65536 0 0
106 32 320000 10000 0 0 255 45 26 256 256 0 0 185 182 65536 0 1 65536 0 0
107 33 330000 10000 0 0 256 45 27 256 256 0 0 191 188 65536 0 1 65536 0 0
108 34 340000 10000 0 0 256 45 27 256 256 0 0 197 194 65536 0 1 65536 0 0
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110 36 360000 10000 0 0 256 45 29 256 256 0 0 209 207 65536 0 1 65536 0 0