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Robert Allan JamesandClaude Sonnet 5 36965cf812 riscv64: explicit Bare-mode satp switch (item 4.3.5a)

Punch list §25 item 4.3.5a complete.

Firmware (EDK2 RISC-V) leaves Sv57 paging active at kernel entry with an
identity mapping that has at least one confirmed hole (PLIC threshold
register). Verified live before acting: satp.MODE/PPN and __kernel_start's
address confirmed identity mapping; switched to Bare mode (csrw satp, x0 +
sfence.vma) in arch_early_init(), ahead of pmm_init()/vmm_init().
Three-arch acceptance boot clean, zero exceptions; riscv64's PLIC_THRESHOLD
write now survives (PLIC driver code itself lands separately with 4.3.5b).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>

2026-08-08 11:07:29 -04:00

artemis_stress

Add Artemis compudynamics implementation plan; add stress campaign fixture

2026-08-02 21:49:16 -04:00

bare_metal

riscv64: explicit Bare-mode satp switch (item 4.3.5a)

2026-08-08 11:07:29 -04:00

README.md

Initial commit — LithosAnanke kernel

2026-08-01 07:49:56 -04:00

README.md

experiments/

Design of Experiments (DoE) campaign data and analysis for the LithosAnanke kernel.

bare_metal/ — the bare-metal DoE experiment: blind full-factorial 2⁴ runs measuring the L8 Jacquard mode selector's effect on the Steady-State Machine across amd64/aarch64/riscv64. See experiments/bare_metal/README.md for the full directory layout (runs/, latest/, analysis/{charts,tables,report}).

Hosted-VM DoE campaigns (factorial/heartbeat/ablation studies) live under docs/working/experiments/ instead — this top-level directory is specifically the kernel/bare-metal side.