LithosAnanake/experiments/bare_metal/runs/doe-aarch64-20260811-225514.csv at 413b5a9bbfdaf8113003f1c48ddb7277c7f98cb0

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T

Robert Allan JamesandClaude Sonnet 5 c92be2768f FABRIC.md item 4.4t: confine REPL text rendering to the CANVAS box

vt100's TTF-mode text grid now operates within the per-arch 640x480 box
(computed in 4.4o, pixel-verified in 4.4p) instead of the full framebuffer:
box-origin offset in px_of()/py_of(), box-derived cols/rows (53x20) set
before the 4.4q scrollback allocation depends on them, mode-aware
erase_display()/reverse-index fill, and a new box-scoped fb_scroll_rect()
alongside the existing whole-framebuffer fb_scroll_rows() (bitmap/boot mode
unaffected either way). Also clears the full framebuffer once at the
bitmap-to-TTF switch so leftover boot debris doesn't sit frozen outside the
box now that erase_display(2) is box-scoped afterward.

Three-arch QEMU boot + pixel-scanned screendumps confirm zero non-background
pixels land outside the box on amd64, aarch64, and riscv64.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>

2026-08-11 23:07:04 -04:00

7.4 KiB

Raw Blame History

1	tick_number	elapsed_ns	tick_interval_ns	word_executions_delta	hot_word_count	avg_word_heat_q48	window_width	actual_window_size	jitter_bits	apic_ticks	time_trust_q48	vm_call_depth_max	hera_heat_q48
2	1	10000	10000	183	4	45	731	731	0	0	65536	0	65536
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5	4	40000	10000	174	8	71	4096	0	0	0	65536	0	65536
6	5	50000	10000	150	9	78	582	582	0	0	65536	0	65536
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9	8	80000	10000	214	16	83	685	685	0	0	65536	0	65536
10	9	90000	10000	216	19	82	4096	0	0	0	65536	0	65536
11	10	100000	10000	222	21	84	567	567	0	0	65536	0	65536
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13	12	120000	10000	189	26	83	4096	0	0	0	65536	0	65536
14	13	130000	10000	221	28	80	731	731	0	0	65536	0	65536
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16	15	150000	10000	203	30	82	731	731	0	0	65536	0	65536
17	16	160000	10000	201	32	83	567	567	0	0	65536	0	65536
18	17	170000	10000	190	34	86	731	731	0	0	65536	0	65536
19	18	180000	10000	170	35	73	582	582	0	0	65536	0	65536
20	19	190000	10000	154	35	40	731	731	0	0	65536	0	65536
21	20	200000	10000	154	35	38	567	567	0	0	65536	0	65536
22	21	210000	10000	153	38	37	4096	0	0	0	65536	0	65536
23	22	220000	10000	167	39	38	582	582	0	0	65536	0	65536
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25	24	240000	10000	175	10	25	731	731	0	0	65536	0	65536
26	25	250000	10000	196	11	23	731	731	0	0	65536	0	65536
27	26	260000	10000	192	14	24	4096	0	0	0	65536	0	65536
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29	28	280000	10000	158	17	23	4096	0	0	0	65536	0	65536
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36	35	350000	10000	154	16	36	731	731	0	0	65536	0	65536
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51	50	500000	10000	214	69	21	4096	694	0	0	65536	0	65536
52	51	510000	10000	227	71	23	4096	883	0	0	65536	0	65536
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58	57	570000	10000	193	80	28	4096	1712	0	0	65536	0	65536
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61	60	600000	10000	52	10	28	4096	1757	0	0	65536	0	65536
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86	12	120000	10000	256	36	12	4096	1490	0	1102	65536	0	65536
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89	15	150000	10000	256	39	13	4096	2204	0	1603	65536	0	65536
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91	17	170000	10000	256	39	15	4096	2713	0	1958	65536	0	65536
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109	35	350000	10000	256	45	28	256	256	0	5159	65536	1	65536
110	36	360000	10000	256	45	29	256	256	0	5338	65536	1	65536

7.4 KiB Raw Blame History

7.4 KiB

Raw Blame History