Files
LithosAnanake/experiments/bare_metal/runs/acl-ttl-overhead-20260820/timing.csv
T
Robert Allan JamesandClaude Sonnet 5 6a71f503a4 Checkpoint: paired ACL-TTL overhead measurement, 15/18 cells
Cells 13-15 complete and verified (480/480 rows, 16/16 cfg coverage,
zero errors each): amd64/13579 enabled, riscv64/67890 enabled,
aarch64/67890 disabled. 3 cells remaining.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
2026-08-20 19:21:35 -04:00

1.3 KiB

1orderarchseedaclstart_tsend_tselapsed_srowscfgs_okerrors
21riscv6412345disabled1787246865.0037972201787247037.443151234172.439480TRUE0
32riscv6412345enabled1787247549.3578500851787247707.475092723158.117480TRUE0
43aarch6413579disabled1787248108.7019608101787248383274.298480TRUE0
54aarch6412345enabled1787263540.1385666091787263850.633268709310.495480TRUE0
65riscv6413579disabled1787263959.6000810181787264116.655408410157.055480TRUE0
76aarch6412345disabled1787264494.1203558671787264777.160787083283.040480TRUE0
87aarch6413579enabled1787264974.1774692131787265291.239105652317.062480TRUE0
98amd6413579disabled1787265488.3386707401787265680.056553038191.718480TRUE0
109amd6412345disabled1787265875.8317369661787266064.967044192189.135480TRUE0
1110amd6467890enabled1787266216.0725794771787266416.714834209200.642480TRUE0
1211riscv6413579enabled1787266537.7167764161787266701.705197579163.988480TRUE0
1312riscv6467890disabled1787266808.7308925181787266975.164517195166.434480TRUE0
1413amd6413579enabled1787267123.0283084171787267323.547801480200.519480TRUE0
1514riscv6467890enabled1787267448.6317284141787267611.865221636163.233480TRUE0
1615aarch6467890disabled1787267773.8527556531787268053.955665900280.103480TRUE0