FABRIC-3.md: per-board hardware-identification reference (SS VI)
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Consolidated SoC/CPU/RAM/I-O facts for all three real-hardware
targets, researched via web search with sources cited rather than
assumed from memory:

- amd64 (Beelink SER5): Ryzen 7 family confirmed; exact SKU
  (5700U/5800H/7735HS all shipped under this branding) not yet
  confirmed against the actual unit -- flagged, not guessed.
- aarch64 (Raspberry Pi 5): BCM2712, quad-core Cortex-A76 @ 2.4GHz,
  VideoCore VII GPU, LPDDR4X-4267. FEAT_RNG (RNDR) presence on this
  core flagged as unconfirmed either way.
- riscv64 (Milk-V Mars): StarFive JH7110, 4x SiFive U74-MC + 1x S7
  monitor core, up to 1.5GHz. Noted it shares its SoC with the
  StarFive VisionFive 2 -- existing VisionFive 2 bring-up material
  may transfer directly.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019YcT3H2PQeyujrzjqS3Var
This commit is contained in:
Robert Allan James
2026-09-04 12:37:29 -04:00
co-authored by Claude Sonnet 5
parent a66af477ac
commit 987c751352
+65
View File
@@ -291,3 +291,68 @@ boots on the real board, the Zkr (RNDR) entropy backend live. Same gap as aarch6
- Zkr/RNDR instruction availability on the Mars's actual CPU (riscv64 Scalar Crypto extension
support varies by implementation) — not yet confirmed.
- Same observation-method question as the other two boards.
---
## VI. Hardware identification reference
Per-board SoC/CPU facts, consolidated here so later sections don't have to re-derive them.
Researched 2026-09-04 (web search, sources cited); anything not directly confirmed against
the actual unit in hand is flagged as such rather than assumed.
### amd64 — Beelink SER5 (reference/development machine)
- **CPU: AMD Ryzen 7 family.** Beelink has shipped the "SER5" name with several different
Ryzen 7 SKUs over its product life (5700U, 5800H, 7735HS all confirmed to exist under this
branding) — **exact SKU on this unit not yet confirmed**; check `dmesg`/BIOS/the physical
unit when convenient (`cat /proc/cpuinfo` or the BIOS splash screen under Linux/before
LithosAnanke boots, since LithosAnanke itself has no CPU-identification word yet). Not
load-bearing for this document's own genericity requirement (§III) — the boot path must not
depend on which SKU this is, by design — but worth pinning down for this reference's own
accuracy.
- **Architecture generation**: Zen2 (5700U/5800H) or Zen3 (7735HS) depending on the SKU above
— matters for any future CPU-feature-detection work (e.g. RDRAND is present on all of
these; that part's already confirmed live via `rng: backend = rdrand`, §III).
- Sources: [Gentoo wiki — SER5 5560U](https://wiki.gentoo.org/wiki/Beelink_SER5_AMD_Ryzen_5_5560U_Mini_PC),
[Starry Hope — SER5](https://www.starryhope.com/minipcs/models/beelink-ser5-mini-pc/),
[Starry Hope — SER5 Pro](https://www.starryhope.com/minipcs/models/beelink-ser5-pro-mini-pc/),
[Minixpc — SER5 Max](https://minixpc.com/blogs/news/beelink-ser5-max-review-powered-by-amd-ryzen7-5800h-processor).
### aarch64 — Raspberry Pi 5 (sole target)
- **SoC: Broadcom BCM2712.**
- **CPU**: quad-core 64-bit Arm Cortex-A76, 2.4 GHz, 512 KB per-core L2 cache, 2 MB shared L3.
- **GPU**: VideoCore VII, 12-core, 800 MHz, OpenGL ES 3.1 + Vulkan 1.2 (not relevant to
LithosAnanke's own framebuffer work — that goes through the mailbox property interface,
§IV.1 — but recorded here for completeness).
- **RAM**: LPDDR4X-4267, board variants at 1/2/4/8/16 GB, 32-bit memory interface, ~17 GB/s
bandwidth.
- **I/O**: RP1 companion chip (PCIe 2.0 x4-attached) handles GPIO, USB 2.0/3.0, Gigabit
Ethernet, CSI/DSI, analog video — confirmed separately (§IV.2) to have no RNG peripheral in
its own published peripheral list.
- **Cortex-A76 and `FEAT_RNG` (ARMv8.5 `RNDR`/`RNDRRS`)**: not confirmed present — A76 is not
among the cores that typically implement this feature (more common on newer cores like
Cortex-X2/A710); if this matters for any future entropy-source decision, verify via `ID_AA64ISAR0_EL1`
directly on the real board rather than assuming either way.
- Sources: [CNX Software — Pi 5 launch](https://www.cnx-software.com/2023/09/28/raspberry-pi-5-sbc-broadcom-bcm2712-quad-core-cortex-a76-soc/),
[Raspberry Pi — Processors doc](https://www.raspberrypi.com/documentation/computers/processors.html),
[sbcwiki — BCM2712](https://sbcwiki.com/docs/soc-manufacturers/broadcom/bcm2712/boards/rasperrypi-5/).
### riscv64 — Milk-V Mars (sole target)
- **SoC: StarFive JH7110**, 28 nm.
- **CPU**: 4× SiFive U74-MC application cores (RV64GC) + 1× SiFive S7 monitor core, up to
1.5 GHz.
- **RAM**: up to 8 GB LPDDR4; storage via eMMC slot + microSD slot.
- **I/O**: 3× USB 3.0, 1× USB 2.0, HDMI 2.0 (4K), Gigabit Ethernet with PoE support, M.2 E-Key
(WiFi/BT), 4-lane + 2-lane MIPI CSI, 40-pin GPIO header.
- **Physical**: designed to Raspberry Pi 3B dimensions — cases/heatsinks/fans for that form
factor are compatible.
- **Multimedia**: H.264/H.265 4K@60fps decode, H.265 1080p@30fps encode (not relevant to
LithosAnanke's own bring-up, recorded for completeness).
- Same JH7110 SoC as the StarFive VisionFive 2 — any VisionFive 2 bring-up material found
while researching §V's own boot-chain question is likely directly applicable here too, worth
checking first before assuming Mars-specific research is needed from scratch.
- Sources: [milkv.io — Mars overview](https://milkv.io/docs/mars/overview),
[milkv.io — Mars product page](https://milkv.io/mars),
[TinyComputers.io — Mars review](https://tinycomputers.io/posts/milk-v-mars-review.html).