aarch64: virtio-keyboard-pci, interrupt-driven keyboard input (item 4.3.5e)
Punch list §25 item 4.3.5e complete. Extended virtio_input.c with a GIC-routed interrupt path alongside 4.3.5c's PLIC one -- same capability walk, feature negotiation, eventq handling (confirming §27.5.1's prediction that these items would share most of the driver). aarch64_irq_handler() dispatches to virtio_input_isr() before its EOIR write, same claim-dispatch-complete ordering riscv64 uses. Verified with a real QEMU sendkey keypress: exact KEY_A/press match, two real interrupts serviced, identical result to riscv64. Found (not fixed) an unrelated pre-existing bug: BYE's cold-reset path faults on aarch64, discovered incidentally since nobody had exercised it from a monitored session before. Three-arch acceptance boot clean. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
co-authored by
Claude Sonnet 5
parent
2a2d7c5e5e
commit
a373c9124a
@@ -4215,7 +4215,7 @@ document and committing that amendment as its own item.*
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> live (`virtio-blk-pci` uses it today on this same board). Probe code reverted after
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> recording this result — not committed; this item remains unstarted.
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- [ ] **4.3.5e — aarch64: virtio-keyboard-pci, interrupt-driven.** Add `virtio-keyboard-pci`
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- [x] **4.3.5e — aarch64: virtio-keyboard-pci, interrupt-driven.** Add `virtio-keyboard-pci`
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to the aarch64 `qemu`/`qemu-esp` targets — the existing `virtio-blk-pci` device proves the
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PCI bus is already enumerated (`pci.c`) on this board, so this rides the same bus, a new
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device class. Same virtio-input driver shape as 4.3.5c (shared code where the transport
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@@ -4279,6 +4279,50 @@ document and committing that amendment as its own item.*
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unaffected, log committed.
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*Refs:* §27.5.
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> **Done, 2026-08-08.** `virtio_input.c`'s `enable_interrupt_route()` gained an
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> `#elif defined(ARCH_AARCH64)` branch alongside 4.3.5c's riscv64 one — same slot/pin
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> read (`PCI_CFG_INT_PIN`), the §27.5.1 formula (`spi = 3 + ((slot+pin-1) % 4)`, INTID =
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> `32 + spi`) instead of riscv64's §27.5.2 one, calling `apic_spi_enable()` (item 4.3.5d)
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> instead of `plic_enable()`. New `g_virtio_input_gic_intid` global, same "0 is a safe
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> sentinel" reasoning as riscv64's `g_virtio_input_plic_source` (SPIs start at INTID 32,
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> never 0). Everything else in the file — capability walk, feature negotiation, eventq
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> pre-posting, the mandatory ISR-status read — is unchanged, exactly as §27.5.1's original
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> amendment predicted ("this item and 4.3.5e now share most of the actual virtio-input
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> driver logic"). `aarch64_irq_handler()` (`interrupts.c`) dispatches to `virtio_input_isr()`
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> **before** its `GICC_EOIR` write, same claim-dispatch-complete ordering riscv64 uses —
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> required here for a real reason: EOI'ing a still-asserted level-triggered line first
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> would let the GIC immediately re-signal it. `keyboard_words.c`'s `VKBD-EVENT`/`VKBD-DEBUG`
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> guards extended to `ARCH_AARCH64` (previously riscv64-only) — both words already used
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> arch-agnostic `virtio_input.c` symbols, so this was a guard change only, no new logic.
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> `-device virtio-keyboard-pci,addr=0x3` added to the aarch64 `qemu` target (the item's
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> text also named `qemu-esp`, but that target has no virtio-blk-pci/Artemis disk either —
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> not part of §25.0's acceptance boot, skipped as a report-not-fix imprecision in the
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> original item wording, not a deviation from anything load-bearing).
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>
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> Verified with a real keypress, same technique as 4.3.5c: temporary monitor socket
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> (reverted after), QEMU HMP `sendkey a`, `VKBD-EVENT . . . CR VKBD-DEBUG . CR` over the
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> serial socket. Result: `-1 1 30` (`code=30` = `KEY_A` exactly, `value=1` = press) then
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> `2` (two real interrupts serviced) — identical to riscv64's result, first try, no
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> equivalent of 4.3.5d's DAIF bug (this path runs after `arch_enable_interrupts()`, unlike
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> that item's self-test which deliberately ran before it)
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> (`logs/20260808-122317/aarch64/qemu-aarch64-20260808-122317-sendkey-verify.log`).
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>
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> **Found incidentally, reported not fixed:** after the verification above completed
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> cleanly, sending `BYE` to the same session produced `*** EXCEPTION (aarch64) ***`
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> (`ESR_EL1=0x02000000`, EC=0/"unknown reason") in `arch_cold_reset()`'s cold-restart path
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> — same log, lines after the passing test output. Confirmed unrelated to this item
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> (`arch.c`'s reset path, nothing this item touched) and confirmed not a regression this
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> item introduced: riscv64's equivalent `BYE`-terminated session
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> (`logs/20260808-114907/riscv64/`) shows no exception at the same point. Nobody had
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> exercised `BYE` from a monitored serial session before either verification run this
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> session, which is why this surfaced only now. Not this item's job to fix.
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>
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> Three-architecture acceptance boot clean (standard `make qemu`, no monitor socket, `BYE`
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> never sent): amd64 (`logs/20260808-122554/amd64/`), aarch64 (`logs/20260808-122640/
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> aarch64/`, `virtio-input: found device` / `driver ready` present), riscv64
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> (`logs/20260808-122743/riscv64/`, unaffected — this item's riscv64-side changes were
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> doc-comment-only).
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- [ ] **4.3.5f — Checkpoint: one keyboard abstraction, three architectures, no polling.**
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Converge 4.3.5/4.3.5c/4.3.5e behind a single scancode/keycode interface so the REPL
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keyboard-input work (M8, outside Stadium) has one thing to call, not three. Stop and
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@@ -826,6 +826,7 @@ else ifeq ($(ARCH),aarch64)
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-drive if=virtio,format=raw,file=$(QEMU_ISO),media=cdrom \
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-drive id=artdisk,file=$(ARTDISK),format=raw,if=none \
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-device virtio-blk-pci,drive=artdisk \
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-device virtio-keyboard-pci,addr=0x3 \
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-device ramfb \
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-chardev socket,id=cserial,path=$$SERIAL_SOCK,server=on,wait=off,logfile=$$LOG \
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-serial chardev:cserial \
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@@ -1,5 +1,5 @@
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# Capsule Block Manifest — Auto-generated
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<!-- Generated by mkcapsule --manifest 2026-08-08T16:02:43Z -->
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<!-- Generated by mkcapsule --manifest 2026-08-08T16:27:28Z -->
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<!-- DO NOT EDIT — re-run mkcapsule --manifest to refresh. -->
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<!-- Hand-written justifications and immutability notes live -->
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<!-- in MANIFEST.md alongside this auto-generated index. -->
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|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,174,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,180,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,187,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,193,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,199,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,186,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,192,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,198,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,205,65536,0,1,65536,0,0
|
||||
|
||||
|
@@ -60,7 +60,7 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,9,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,14,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
|
||||
@@ -75,10 +75,10 @@ tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,87,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,95,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,102,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,112,65536,0,1,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,111,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,119,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,126,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,134,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,133,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,141,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,148,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,156,65536,0,1,65536,0,0
|
||||
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,10,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,13,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,16,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,23,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,35,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,41,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,48,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,54,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,60,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,66,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,72,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,78,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,85,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,91,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,97,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,104,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,112,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,118,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,124,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,130,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,137,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,143,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,149,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,155,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,162,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,168,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,174,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,180,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,186,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,193,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,199,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,205,65536,0,1,65536,0,0
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,9,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,10,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,14,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,21,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,28,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,34,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,40,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,46,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,52,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,59,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,65,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,71,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,77,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,84,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,90,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,96,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,102,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,109,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,117,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,123,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,130,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,136,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,142,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,148,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,155,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,161,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,167,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,174,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,180,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,186,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,192,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,198,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,205,65536,0,1,65536,0,0
|
||||
|
@@ -0,0 +1,95 @@
|
||||
tick_number,elapsed_ns,tick_interval_ns,cache_hits_delta,bucket_hits_delta,word_executions_delta,hot_word_count,avg_word_heat_q48,window_width,actual_window_size,predicted_label_hits,jitter_bits,apic_ticks,time_trust_q48,variance_q48,vm_call_depth_max,hera_heat_q48,hermes_heat_q48,artemis_heat_q48
|
||||
1,10000,10000,0,0,183,4,45,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,173,5,44,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,184,6,60,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,174,8,71,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,150,9,78,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,159,11,73,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,188,15,71,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,214,16,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,216,19,82,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,222,21,84,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,207,23,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,189,26,83,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,221,28,80,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,204,29,83,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,203,30,82,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,201,32,83,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,190,34,86,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,170,35,73,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,154,35,40,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
20,200000,10000,0,0,154,35,38,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
21,210000,10000,0,0,153,38,37,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
22,220000,10000,0,0,167,38,38,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
23,230000,10000,0,0,176,10,38,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
24,240000,10000,0,0,175,10,25,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
25,250000,10000,0,0,196,11,23,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
26,260000,10000,0,0,192,14,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
27,270000,10000,0,0,158,16,30,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
28,280000,10000,0,0,158,17,23,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
29,290000,10000,0,0,164,17,27,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
30,300000,10000,0,0,154,18,26,685,685,0,0,0,65536,0,0,65536,0,0
|
||||
31,310000,10000,0,0,172,6,25,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
32,320000,10000,0,0,180,9,22,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
33,330000,10000,0,0,145,11,29,567,567,0,0,0,65536,0,0,65536,0,0
|
||||
34,340000,10000,0,0,203,14,30,582,582,0,0,0,65536,0,0,65536,0,0
|
||||
35,350000,10000,0,0,154,16,36,731,731,0,0,0,65536,0,0,65536,0,0
|
||||
36,360000,10000,0,0,144,18,32,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
37,370000,10000,0,0,144,18,29,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
38,380000,10000,0,0,132,18,28,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
39,390000,10000,0,0,180,18,24,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
40,400000,10000,0,0,220,23,20,4096,0,0,0,0,65536,0,0,65536,0,0
|
||||
41,410000,10000,0,0,215,25,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
42,420000,10000,0,0,208,32,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
43,430000,10000,0,0,177,36,19,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
44,440000,10000,0,0,199,42,20,4096,24,0,0,0,65536,0,0,65536,0,0
|
||||
45,450000,10000,0,0,223,47,19,4096,30,0,0,0,65536,0,0,65536,0,0
|
||||
46,460000,10000,0,0,202,50,17,4096,67,0,0,0,65536,0,0,65536,0,0
|
||||
47,470000,10000,0,0,218,57,18,4096,198,0,0,0,65536,0,0,65536,0,0
|
||||
48,480000,10000,0,0,221,60,20,4096,350,0,0,0,65536,0,0,65536,0,0
|
||||
49,490000,10000,0,0,225,66,20,4096,528,0,0,0,65536,0,0,65536,0,0
|
||||
50,500000,10000,0,0,214,69,21,4096,694,0,0,0,65536,0,0,65536,0,0
|
||||
51,510000,10000,0,0,227,71,23,4096,883,0,0,0,65536,0,0,65536,0,0
|
||||
52,520000,10000,0,0,208,71,23,4096,1043,0,0,0,65536,0,0,65536,0,0
|
||||
53,530000,10000,0,0,207,71,25,4096,1202,0,0,0,65536,0,0,65536,0,0
|
||||
54,540000,10000,0,0,200,71,26,4096,1319,0,0,0,65536,0,0,65536,0,0
|
||||
55,550000,10000,0,0,205,72,27,4096,1464,0,0,0,65536,0,0,65536,0,0
|
||||
56,560000,10000,0,0,211,73,27,4096,1620,0,0,0,65536,0,0,65536,0,0
|
||||
57,570000,10000,0,0,193,80,28,4096,1712,0,0,0,65536,0,0,65536,0,0
|
||||
58,580000,10000,0,0,190,5,67,4096,1775,0,0,0,65536,0,0,65536,0,0
|
||||
1,10000,18446744073708981616,0,0,117,4,4,4096,0,0,4895412794951728869,8,65536,0,0,65536,0,0
|
||||
2,20000,10000,0,0,78,10,7,4096,0,0,0,9,65536,0,0,65536,0,0
|
||||
3,30000,10000,0,0,101,13,7,4096,0,0,0,11,65536,0,0,65536,0,0
|
||||
4,40000,10000,0,0,63,19,8,4096,0,0,0,12,65536,0,0,65536,0,0
|
||||
5,50000,10000,0,0,92,25,8,4096,2,0,0,14,65536,0,0,65536,0,0
|
||||
6,60000,10000,0,0,64,27,8,4096,2,0,0,15,65536,0,0,65536,0,0
|
||||
7,70000,10000,0,0,228,32,8,4096,210,0,0,22,65536,0,0,65536,0,0
|
||||
8,80000,10000,0,0,256,34,9,4096,466,0,0,29,65536,0,0,65536,0,0
|
||||
9,90000,10000,0,0,256,36,10,4096,722,0,0,36,65536,0,0,65536,0,0
|
||||
10,100000,10000,0,0,256,36,11,4096,978,0,0,44,65536,0,0,65536,0,0
|
||||
11,110000,10000,0,0,256,36,11,4096,1234,0,0,51,65536,0,0,65536,0,0
|
||||
12,120000,10000,0,0,256,36,12,4096,1490,0,0,58,65536,0,0,65536,0,0
|
||||
13,130000,10000,0,0,256,37,12,4096,1746,0,0,66,65536,0,0,65536,0,0
|
||||
14,140000,10000,0,0,230,39,12,4096,1949,0,0,73,65536,0,0,65536,0,0
|
||||
15,150000,10000,0,0,256,39,13,4096,2204,0,0,80,65536,0,0,65536,0,0
|
||||
16,160000,10000,0,0,256,39,14,4096,2459,0,0,87,65536,0,0,65536,0,0
|
||||
17,170000,10000,0,0,256,39,15,4096,2713,0,0,95,65536,0,0,65536,0,0
|
||||
18,180000,10000,0,0,256,39,15,4096,2969,0,0,102,65536,0,0,65536,0,0
|
||||
19,190000,10000,0,0,256,39,16,4096,3224,0,0,111,65536,0,1,65536,0,0
|
||||
20,200000,10000,0,0,256,41,17,4096,3480,0,0,119,65536,0,1,65536,0,0
|
||||
21,210000,10000,0,0,256,41,17,4096,3736,0,0,126,65536,0,1,65536,0,0
|
||||
22,220000,10000,0,0,256,41,18,4096,3992,0,0,133,65536,0,1,65536,0,0
|
||||
23,230000,10000,0,0,256,41,19,4096,4096,0,0,141,65536,0,1,65536,0,0
|
||||
24,240000,10000,0,0,256,41,20,4096,4096,0,0,148,65536,0,1,65536,0,0
|
||||
25,250000,10000,0,0,256,43,20,2048,2048,0,0,156,65536,0,1,65536,0,0
|
||||
26,260000,10000,0,0,256,45,21,2048,2048,0,0,163,65536,0,1,65536,0,0
|
||||
27,270000,10000,0,0,256,45,22,1024,1024,0,0,170,65536,0,1,65536,0,0
|
||||
28,280000,10000,0,0,256,45,23,1024,1024,0,0,178,65536,0,1,65536,0,0
|
||||
29,290000,10000,0,0,256,45,24,512,512,0,0,185,65536,0,1,65536,0,0
|
||||
30,300000,10000,0,0,256,45,24,512,512,0,0,192,65536,0,1,65536,0,0
|
||||
31,310000,10000,0,0,256,45,25,256,256,0,0,200,65536,0,1,65536,0,0
|
||||
32,320000,10000,0,0,255,45,26,256,256,0,0,207,65536,0,1,65536,0,0
|
||||
33,330000,10000,0,0,256,45,27,256,256,0,0,216,65536,0,1,65536,0,0
|
||||
34,340000,10000,0,0,256,45,27,256,256,0,0,224,65536,0,1,65536,0,0
|
||||
35,350000,10000,0,0,256,45,28,256,256,0,0,231,65536,0,1,65536,0,0
|
||||
36,360000,10000,0,0,256,45,29,256,256,0,0,238,65536,0,1,65536,0,0
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -33,6 +33,14 @@ extern uint32_t apic_timer_ppi(void);
|
||||
extern void apic_eoi_intid(uint32_t intid);
|
||||
extern void apic_timer_rearm(void);
|
||||
|
||||
/* Defined in virtio_input.c (item 4.3.5e). g_virtio_input_gic_intid is 0
|
||||
* (not a valid SPI INTID -- SPIs start at 32) until
|
||||
* virtio_input_find_keyboard() finds a real device and computes its routed
|
||||
* INTID, so this branch is inert on any boot where the device isn't
|
||||
* present. Same extern-in-place convention as the rest of this file. */
|
||||
extern uint32_t g_virtio_input_gic_intid;
|
||||
extern void virtio_input_isr(void);
|
||||
|
||||
/* INTID 1023 = "spurious" (GICv2 spec): the CPU interface has nothing
|
||||
* pending, typically because another interrupt at the same or higher
|
||||
* priority raced this one to acknowledgement. Architecturally defined,
|
||||
@@ -64,6 +72,13 @@ extern void apic_timer_rearm(void);
|
||||
* the rest of the dispatch means a fault in @c heartbeat_tick() cannot
|
||||
* also cost the next tick — same discipline as @c riscv64_timer_rearm()
|
||||
* (item 0.3).
|
||||
*
|
||||
* virtio-input (item 4.3.5e, @c g_virtio_input_gic_intid): dispatched
|
||||
* **before** the @c GICC_EOIR write below, not after — the ISR itself is
|
||||
* what deasserts the device's (level-triggered) interrupt line by reading
|
||||
* its ISR-status capability; EOI'ing first would let the GIC immediately
|
||||
* re-signal a still-asserted line. Same claim-dispatch-complete ordering
|
||||
* @c riscv64_interrupt_handler() uses for its own PLIC-routed devices.
|
||||
*/
|
||||
void aarch64_irq_handler(void)
|
||||
{
|
||||
@@ -74,6 +89,10 @@ void aarch64_irq_handler(void)
|
||||
heartbeat_tick();
|
||||
}
|
||||
|
||||
if (intid == g_virtio_input_gic_intid) {
|
||||
virtio_input_isr();
|
||||
}
|
||||
|
||||
if (intid != GIC_INTID_SPURIOUS) {
|
||||
apic_eoi_intid(intid);
|
||||
}
|
||||
|
||||
@@ -1,5 +1,6 @@
|
||||
/*
|
||||
* virtio_input.c — Virtio 1.0 input device driver for StarKernel (item 4.3.5c)
|
||||
* virtio_input.c — Virtio 1.0 input device driver for StarKernel
|
||||
* (riscv64: item 4.3.5c; aarch64: item 4.3.5e)
|
||||
*
|
||||
* Modern virtio 1.0 interface only (device ID 0x1052). No legacy fallback
|
||||
* exists for virtio-input (unlike virtio-blk's 0x1001) -- input postdates
|
||||
@@ -9,20 +10,24 @@
|
||||
* buffers: unlike virtio_blk.c's synchronous request/response pattern, the
|
||||
* driver posts empty VirtioInputEvent buffers up front and the device
|
||||
* fills+posts them to the used ring asynchronously, signalled by the PLIC
|
||||
* (see virtio_input_isr(), called from arch/riscv64/interrupts.c on a
|
||||
* matching claim) -- no polling anywhere in this path.
|
||||
* (riscv64) or GIC (aarch64) -- see virtio_input_isr(), called from
|
||||
* arch/riscv64/interrupts.c or arch/aarch64/interrupts.c on a matching
|
||||
* claim -- no polling anywhere in this path.
|
||||
*
|
||||
* The PCI capability walker below is a deliberate duplicate of
|
||||
* virtio_blk.c's static walk_virtio_caps(), not a shared/promoted version
|
||||
* -- decided at this item rather than refactoring the working, tested
|
||||
* virtio_blk.c (FABRIC.md item 4.3.5c note, carries forward to 4.3.5e).
|
||||
* -- decided at item 4.3.5c rather than refactoring the working, tested
|
||||
* virtio_blk.c, carried forward here.
|
||||
*
|
||||
* Interrupt routing (PLIC source computation/enable) is riscv64-specific
|
||||
* and arch-guarded below; the capability walk, feature negotiation, and
|
||||
* queue/event handling are arch-agnostic and compiled for all three
|
||||
* targets (same idiom as pci.c itself: config-space access already
|
||||
* differs per arch internally, this file adds one more arch-guarded
|
||||
* piece on top rather than a second copy of the whole file).
|
||||
* Interrupt routing (source computation/enable) is arch-guarded below,
|
||||
* riscv64 (PLIC) and aarch64 (GIC) each with their own slot/pin-to-source
|
||||
* formula (FABRIC.md §27.5.1 aarch64, §27.5.2 riscv64, both derived live
|
||||
* from this host's own QEMU DTB, not assumed identical to each other). The
|
||||
* capability walk, feature negotiation, and queue/event handling are
|
||||
* arch-agnostic and compiled for all three targets (same idiom as pci.c
|
||||
* itself: config-space access already differs per arch internally, this
|
||||
* file adds one more arch-guarded piece on top rather than a second copy
|
||||
* of the whole file).
|
||||
*/
|
||||
|
||||
#ifndef __STARKERNEL__
|
||||
@@ -42,6 +47,12 @@
|
||||
#include "starkernel/plic.h"
|
||||
#endif
|
||||
|
||||
#if defined(ARCH_AARCH64)
|
||||
/* Defined in arch/aarch64/apic.c (item 4.3.5d). Extern-in-place, same
|
||||
* convention that file's own cross-file declarations already use. */
|
||||
extern void apic_spi_enable(uint32_t intid);
|
||||
#endif
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Virtio 1.0 PCI capability structures -- duplicated from virtio_blk.c
|
||||
* (see file header for why), plus VIRTIO_PCI_CAP_ISR_CFG actually used
|
||||
@@ -200,6 +211,12 @@ static int g_vinput_ready = 0;
|
||||
* real claim. Checked by arch/riscv64/interrupts.c's dispatch. */
|
||||
uint32_t g_virtio_input_plic_source = 0;
|
||||
|
||||
/* GIC INTID (aarch64) this device's INTx routes to, computed at init. 0 is
|
||||
* not a valid SPI INTID (SPIs start at 32), so it is likewise a safe
|
||||
* "invalid/not found" sentinel. Checked by arch/aarch64/interrupts.c's
|
||||
* dispatch. */
|
||||
uint32_t g_virtio_input_gic_intid = 0;
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Capability walker -- duplicated from virtio_blk.c, see file header.
|
||||
* ------------------------------------------------------------------------- */
|
||||
@@ -251,11 +268,15 @@ static inline void wmb(void) {
|
||||
}
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Interrupt routing -- riscv64 (PLIC). aarch64 (GIC, item 4.3.5e) is not
|
||||
* yet implemented; the #else path reports rather than silently no-ops, so
|
||||
* a future arch attempting to use this file without adding its own
|
||||
* routing fails loudly instead of "working" with a permanently-pending,
|
||||
* never-enabled source.
|
||||
* Interrupt routing -- riscv64 (PLIC, item 4.3.5c) and aarch64 (GIC, item
|
||||
* 4.3.5e). Both compute their target source from the same PCI slot/pin
|
||||
* swizzle shape (§27.5.1 aarch64, §27.5.2 riscv64) but with different base
|
||||
* offsets and controller calls -- derived independently from each board's
|
||||
* own DTB, not assumed identical. The #else path (amd64, which never
|
||||
* attaches this device) reports rather than silently no-ops, so a future
|
||||
* arch attempting to use this file without adding its own routing fails
|
||||
* loudly instead of "working" with a permanently-pending, never-enabled
|
||||
* source.
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
#if defined(ARCH_RISCV64)
|
||||
@@ -275,6 +296,23 @@ static int enable_interrupt_route(const PciDevice *pci)
|
||||
g_virtio_input_plic_source = source;
|
||||
return 0;
|
||||
}
|
||||
#elif defined(ARCH_AARCH64)
|
||||
static int enable_interrupt_route(const PciDevice *pci)
|
||||
{
|
||||
uint8_t pin = pci_read8(pci, (uint16_t)PCI_CFG_INT_PIN);
|
||||
if (pin < 1u || pin > 4u) {
|
||||
console_println("virtio-input: bad/absent INT_PIN");
|
||||
return -1;
|
||||
}
|
||||
uint32_t slot = pci->device;
|
||||
uint32_t spi = 3u + ((slot + (uint32_t)pin - 1u) % 4u);
|
||||
uint32_t intid = 32u + spi;
|
||||
|
||||
apic_spi_enable(intid);
|
||||
|
||||
g_virtio_input_gic_intid = intid;
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int enable_interrupt_route(const PciDevice *pci)
|
||||
{
|
||||
@@ -466,7 +504,8 @@ int virtio_input_find_keyboard(void) {
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
* Interrupt path -- called from arch/riscv64/interrupts.c on a matching
|
||||
* PLIC claim (g_virtio_input_plic_source).
|
||||
* PLIC claim (g_virtio_input_plic_source) or arch/aarch64/interrupts.c on
|
||||
* a matching GIC IRQ (g_virtio_input_gic_intid).
|
||||
* ------------------------------------------------------------------------- */
|
||||
|
||||
void virtio_input_isr(void) {
|
||||
|
||||
@@ -34,9 +34,10 @@
|
||||
* LAPIC spurious-vector interrupts, both since boot.
|
||||
*
|
||||
* @par VKBD-EVENT ( -- code value -1 | 0 )
|
||||
* Item 4.3.5c. Pop one decoded EV_KEY event (Linux input-event code/value
|
||||
* pair) off the virtio-input interrupt-fed ring buffer. Kernel-only,
|
||||
* riscv64-only today (virtio-keyboard-pci); no-op elsewhere.
|
||||
* Items 4.3.5c (riscv64) / 4.3.5e (aarch64). Pop one decoded EV_KEY event
|
||||
* (Linux input-event code/value pair) off the virtio-input interrupt-fed
|
||||
* ring buffer. Kernel-only, riscv64/aarch64 (virtio-keyboard-pci); no-op
|
||||
* on amd64 (i8042 hardware instead, see KBD-SCAN).
|
||||
*
|
||||
* @par VKBD-DEBUG ( -- isr_count )
|
||||
* Standing diagnostic: count of virtio-input ISR invocations since boot.
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
#include "starkernel/i8042.h"
|
||||
#endif
|
||||
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
#if defined(__STARKERNEL__) && (defined(ARCH_RISCV64) || defined(ARCH_AARCH64))
|
||||
#include "starkernel/virtio_input.h"
|
||||
#endif
|
||||
|
||||
@@ -54,16 +54,17 @@ static void kbw_debug(VM *vm)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* VKBD-EVENT ( -- code value -1 | 0 ): item 4.3.5c, riscv64 virtio-input.
|
||||
* Pop one decoded EV_KEY event off the interrupt-fed ring buffer. Pushes
|
||||
* code and value and -1 (true) if one was available, or just 0 (false) if
|
||||
* the buffer was empty. Distinct word from KBD-SCAN rather than a shared
|
||||
* one: different device, different event shape (Linux-style code/value
|
||||
* pair vs. a raw XT scancode byte) -- convergence onto one interface is
|
||||
* item 4.3.5f's explicit job, not this one's. */
|
||||
/* VKBD-EVENT ( -- code value -1 | 0 ): item 4.3.5c (riscv64) / 4.3.5e
|
||||
* (aarch64) virtio-input. Pop one decoded EV_KEY event off the
|
||||
* interrupt-fed ring buffer. Pushes code and value and -1 (true) if one
|
||||
* was available, or just 0 (false) if the buffer was empty. Distinct word
|
||||
* from KBD-SCAN rather than a shared one: different device, different
|
||||
* event shape (Linux-style code/value pair vs. a raw XT scancode byte) --
|
||||
* convergence onto one interface is item 4.3.5f's explicit job, not this
|
||||
* one's. */
|
||||
static void kbw_vevent(VM *vm)
|
||||
{
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
#if defined(__STARKERNEL__) && (defined(ARCH_RISCV64) || defined(ARCH_AARCH64))
|
||||
uint16_t code;
|
||||
uint32_t value;
|
||||
if (virtio_input_pop_event(&code, &value)) {
|
||||
@@ -83,7 +84,7 @@ static void kbw_vevent(VM *vm)
|
||||
extern volatile uint32_t g_virtio_input_isr_count;
|
||||
static void kbw_vdebug(VM *vm)
|
||||
{
|
||||
#if defined(__STARKERNEL__) && defined(ARCH_RISCV64)
|
||||
#if defined(__STARKERNEL__) && (defined(ARCH_RISCV64) || defined(ARCH_AARCH64))
|
||||
vm_push(vm, (cell_t)g_virtio_input_isr_count);
|
||||
#else
|
||||
vm_push(vm, 0);
|
||||
|
||||
Reference in New Issue
Block a user