Robert Allan JamesandClaude Sonnet 5 11c93773d0
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FABRIC-3.md: pci_init() DTB path item was wrong -- re-scope, don't build the ECAM version
Investigated before writing code, per this document's own discipline, and
found the original item 5 text's assumption doesn't hold: it framed this
as "swap the ACPI MCFG lookup for a DTB one, same flat-ECAM access
underneath." Confirmed against three primary sources that this is wrong:

- bcm2712-rpi-5-b.dts: RP1 sits under pcie2 ("brcm,bcm2712-pcie"),
  reg = <0x10 0x00120000 0x00 0x9310> -- a ~37KB window, far too small
  for a flat 256MB ECAM region.
- pcie-brcmstb.c (the real Linux driver for this compatible string):
  brcm_pcie_map_bus() computes a standard ECAM-shaped offset but accesses
  it through an IDX_ADDR/DATA_ADDR indirect index+window pair, not a
  direct MMIO read. A real third config-access mechanism, not a bigger
  version of the DTB-lookup task.

Re-scoped item 5 (§IV.3) to record the real shape: pci.c's cfg_read32/
cfg_write32 family dispatches today via #ifdef ARCH_AMD64 vs. everything
else (flat ECAM) -- but QEMU aarch64 (flat ECAM, real ACPI MCFG) and Pi 5
aarch64 (Broadcom indirect windowing) are the same build, so this needs a
runtime dispatch change to a file all three architectures currently boot
through, not a small addition. Also flagged: pci_init()'s vmm_map_range()
for the ECAM window is amd64-only today (aarch64/riscv64 rely on UEFI's
identity map); native boot has no UEFI identity map at all, so any PCIe
work here needs its own explicit mapping regardless of access mechanism.

Also corrected §V.3 item 5's now-stale "shares the same code" cross-
reference -- the Mars's JH7110 PCIe controller needs its own primary-
source check, not an assumed-shared implementation with RP1's.

Not implemented this pass -- recording the real shape is the deliverable;
building the runtime-dispatch version is a materially larger, separate
task. Doc-only change; 3-arch boot verified per the project's standing
rule, proving only that nothing regressed.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019YcT3H2PQeyujrzjqS3Var
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LithosAnanke v2.0.1

UEFI-bootable FORTH microkernel. Boots from firmware, initialises memory and interrupts, then runs the StarForth VM as its sole userspace runtime. No libc. No OS. Just stone and necessity.

Lithos (foundation) + Ananke (necessity) — the kernel under StarshipOS.


Status — M7.1 (Capsule System · Multi-VM Fleet)

Milestone Status
M0M6 UEFI boot · PMM · VMM · IDT · APIC · heap · framebuffer VT100 console (v1.5.1-FINAL) Complete
M7 StarForth VM integration + parity validation Complete
M7.1 Capsule birth protocol · Mama FORTH vocabulary · Tripod multi-VM fleet (Hermes/Artemis) · Word-level ACL (Phases 17) 🔄 In Progress
M8 REPL — keyboard input, interactive Forth Planned
M9 Block storage — AHCI driver Planned

POST at boot: parity hash verified across amd64/aarch64/riscv64 · Mama capsule dictionary: 453 words

What's live in M7.1

  • Tripod — a named multi-VM fleet (Hera the Mama VM, Artemis, two Hermes instances) births, runs, and re-births independently, verified booting live pre-REPL on all three architectures.
  • Hermes — a 17-block inter-VM messaging/channel layer between fleet members, with async delivery and channel negotiation.
  • Artemis — a Block Allocation Map (BAM) storage subsystem with Q48.16 block-heat tracking and cooldown/reclamation (ART-COOL/ART-REAP).
  • Word-level ACL — every dictionary entry carries a TTL/allow/mode/pin access-control record. Strict, TTL, and pinned modes; two console layers (emergency ok> and superuser zuse)ok>). Phases 17 complete (C infrastructure, FORTH policy layer, zuse bootstrap superuser, Isabelle proof stubs, kernel parity); Phase 8 (Ed25519 PKI / thumbdrive challenge-response) is the only item remaining. Measured overhead once active on every check: +0.0054%+0.0088%, CV = 0.000%, across a 3×3 Latin-square DoE campaign (architecture × seed × 30 replicates) — three orders of magnitude below the measurement floor.
  • VM Fleet Attractor physics — the L8 Jacquard mode selector now has a real per-VM heat channel into fleet-wide tuning, replacing hardcoded compudynamics constants with a dynamically-inferred rate.
  • Kconfig build configuration — every physics/heartbeat/pipelining/ kernel-only tuning knob (~40 total) is now a discoverable, optional Kconfig symbol shared with the hosted VM build. See Quick Start below.

Quick Start

# Build kernel (requires cross-compilation toolchain, or native gcc)
make -f Makefile.starkernel ARCH=amd64

# Run in QEMU with OVMF
make -f Makefile.starkernel qemu

# Other architectures
make -f Makefile.starkernel ARCH=aarch64 qemu
make -f Makefile.starkernel ARCH=riscv64 qemu

Artifacts: build/amd64/kernel/starkernel_loader.efi · build/amd64/kernel/starkernel_kernel.elf

For the hosted VM by itself (Linux, no cross-compiler needed, no bare-metal tooling): see the separate StarForth repository — LithosAnanke used to be a branch inside that repo, now it's its own project with its own master.

Build configuration (optional)

Every kernel-only knob (STARFORTH_ENABLE_VM, PARITY_MODE, the shared physics/heartbeat family, etc.) is an optional Kconfig symbol — a plain make -f Makefile.starkernel uses the same defaults it always has unless you opt in:

make -f Makefile.starkernel ARCH=amd64 menuconfig
make -f Makefile.starkernel ARCH=amd64 kernel_amd64_defconfig

Documentation

System Architecture Full kernel + VM design
HAL Reference Hardware abstraction layer interfaces
Capsule System — M7.1 Capsule birth protocol design
VM Fleet Attractor design log Tripod/Hermes/Artemis physics + build-system history
Getting Started / Kconfig reference Full symbol reference for both build targets
Changelog Milestone-level history
Roadmap Milestone plan through self-hosting

License

Starship License 1.0 (SL-1.0) — free for personal, research, and educational use. Commercial use requires a separate agreement. Attribution to R.A. James (Captain Bob) must be preserved in all distributions.

Patent pending. USPTO provisional filed December 2025 — physics-grounded self-adaptive runtime system. This license does not grant patent rights. Licensing inquiries: rajames440@gmail.com


Robert A. James (Captain Bob) · Systems Engineer · Hacking since 1973

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