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LithosAnanake/experiments/bare_metal/runs/acl-ttl-overhead-20260820/amd64-seed12345-enabled.csv
T
Robert Allan JamesandClaude Sonnet 5 6e7323b3b8 ACL-TTL overhead: paired 18-cell measurement complete, FABRIC-2.md Section P 
Full 18-cell paired campaign (9 arch/seed pairs x ACL disabled/enabled)
complete: 8,640/8,640 rows, all 16 cfg values x 30 each in every cell,
zero errors. Confirmed capsules/zuse.4th's ACL-ZUSE-BOOT self-pin bug
(self-pin placed inside its own colon definition, causing a genuine
forward-reference failure) is isolated from the core ACL enforcement
mechanism -- verified via live VM state query on multiple cells that
ACL-INIT-PRIMITIVES and EXEC/BYE pinning both complete correctly
regardless.

Result: +5.30% pooled overhead, +4.42% unweighted mean across the 9
pairs (sd 6.77%), paired t=2.043 (df=8) -- not significant at p<0.05.
Documented honestly as a real positive trend that doesn't establish a
precise percentage with confidence, given wall-clock timing's noise
floor is comparable to the effect size -- unlike the original ACL-RWT
campaign's VM-internal tick-counter methodology. A tighter measurement
(more replications, or reading a VM-internal counter directly) is
scoped as a next step, not attempted here.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
2026-08-20 19:41:55 -04:00

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436,3,16,0,0,32768,32768,7,246,256,62,-1,1,0,0,52429
437,5,24,0,9830,0,32768,7,246,256,62,-1,1,0,0,52429
438,11,6,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
439,0,2,0,0,0,0,7,246,256,62,-1,1,0,0,52429
440,1,28,0,0,0,32768,7,246,256,62,-1,1,0,0,52429
441,6,8,0,9830,32768,0,7,246,256,62,-1,1,0,0,52429
442,5,11,0,9830,0,32768,7,246,256,62,-1,1,0,0,52429
443,11,9,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
444,10,26,49152,0,32768,0,7,246,256,62,-1,1,0,0,52429
445,9,10,49152,0,0,32768,7,246,256,62,-1,1,0,0,52429
446,13,3,49152,9830,0,32768,7,246,256,62,-1,1,0,0,52429
447,13,18,49152,9830,0,32768,7,246,256,62,-1,1,0,0,52429
448,4,4,0,9830,0,0,7,246,256,62,-1,1,0,0,52429
449,4,19,0,9830,0,0,7,246,256,62,-1,1,0,0,52429
450,11,5,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
451,5,3,0,9830,0,32768,7,246,256,62,-1,1,0,0,52429
452,3,29,0,0,32768,32768,7,246,256,62,-1,1,0,0,52429
453,15,11,49152,9830,32768,32768,7,246,256,62,-1,1,0,0,52429
454,11,25,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
455,3,23,0,0,32768,32768,7,246,256,62,-1,1,0,0,52429
456,2,28,0,0,32768,0,7,246,256,62,-1,1,0,0,52429
457,14,20,49152,9830,32768,0,7,246,256,62,-1,1,0,0,52429
458,3,3,0,0,32768,32768,7,246,256,62,-1,1,0,0,52429
459,11,15,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
460,12,7,49152,9830,0,0,7,246,256,62,-1,1,0,0,52429
461,2,11,0,0,32768,0,7,246,256,62,-1,1,0,0,52429
462,5,6,0,9830,0,32768,7,246,256,62,-1,1,0,0,52429
463,12,9,49152,9830,0,0,7,246,256,62,-1,1,0,0,52429
464,6,14,0,9830,32768,0,7,246,256,62,-1,1,0,0,52429
465,11,27,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
466,5,26,0,9830,0,32768,7,246,256,62,-1,1,0,0,52429
467,9,20,49152,0,0,32768,7,246,256,62,-1,1,0,0,52429
468,1,3,0,0,0,32768,7,246,256,62,-1,1,0,0,52429
469,13,23,49152,9830,0,32768,7,246,256,62,-1,1,0,0,52429
470,1,24,0,0,0,32768,7,246,256,62,-1,1,0,0,52429
471,11,22,49152,0,32768,32768,7,246,256,62,-1,1,0,0,52429
472,8,1,49152,0,0,0,7,246,256,62,-1,1,0,0,52429
473,7,20,0,9830,32768,32768,7,246,256,62,-1,1,0,0,52429
474,13,9,49152,9830,0,32768,7,246,256,62,-1,1,0,0,52429
475,7,5,0,9830,32768,32768,7,246,256,62,-1,1,0,0,52429
476,4,10,0,9830,0,0,7,246,256,62,-1,1,0,0,52429
477,12,15,49152,9830,0,0,7,246,256,62,-1,1,0,0,52429
478,4,1,0,9830,0,0,7,246,256,62,-1,1,0,0,52429
479,14,5,49152,9830,32768,0,7,246,256,62,-1,1,0,0,52429
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