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LithosAnanake/experiments/bare_metal/runs/acl-ttl-overhead-20260820/amd64-seed67890-disabled.csv
T
Robert Allan JamesandClaude Sonnet 5 6e7323b3b8 ACL-TTL overhead: paired 18-cell measurement complete, FABRIC-2.md Section P 
Full 18-cell paired campaign (9 arch/seed pairs x ACL disabled/enabled)
complete: 8,640/8,640 rows, all 16 cfg values x 30 each in every cell,
zero errors. Confirmed capsules/zuse.4th's ACL-ZUSE-BOOT self-pin bug
(self-pin placed inside its own colon definition, causing a genuine
forward-reference failure) is isolated from the core ACL enforcement
mechanism -- verified via live VM state query on multiple cells that
ACL-INIT-PRIMITIVES and EXEC/BYE pinning both complete correctly
regardless.

Result: +5.30% pooled overhead, +4.42% unweighted mean across the 9
pairs (sd 6.77%), paired t=2.043 (df=8) -- not significant at p<0.05.
Documented honestly as a real positive trend that doesn't establish a
precise percentage with confidence, given wall-clock timing's noise
floor is comparable to the effect size -- unlike the original ACL-RWT
campaign's VM-internal tick-counter methodology. A tighter measurement
(more replications, or reading a VM-internal counter directly) is
scoped as a next step, not attempted here.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
2026-08-20 19:41:55 -04:00

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435,6,7,0,9830,32768,0,7,246,256,82,-1,1,0,0,52429
436,0,15,0,0,0,0,7,246,256,82,-1,1,0,0,52429
437,13,21,49152,9830,0,32768,7,246,256,82,-1,1,0,0,52429
438,7,11,0,9830,32768,32768,7,246,256,82,-1,1,0,0,52429
439,7,13,0,9830,32768,32768,7,246,256,82,-1,1,0,0,52429
440,12,16,49152,9830,0,0,7,246,256,82,-1,1,0,0,52429
441,3,12,0,0,32768,32768,7,246,256,82,-1,1,0,0,52429
442,8,6,49152,0,0,0,7,246,256,82,-1,1,0,0,52429
443,12,3,49152,9830,0,0,7,246,256,82,-1,1,0,0,52429
444,2,9,0,0,32768,0,7,246,256,82,-1,1,0,0,52429
445,13,1,49152,9830,0,32768,7,246,256,82,-1,1,0,0,52429
446,7,26,0,9830,32768,32768,7,246,256,82,-1,1,0,0,52429
447,3,16,0,0,32768,32768,7,246,256,82,-1,1,0,0,52429
448,13,7,49152,9830,0,32768,7,246,256,82,-1,1,0,0,52429
449,9,20,49152,0,0,32768,7,246,256,82,-1,1,0,0,52429
450,13,6,49152,9830,0,32768,7,246,256,82,-1,1,0,0,52429
451,5,11,0,9830,0,32768,7,246,256,82,-1,1,0,0,52429
452,11,22,49152,0,32768,32768,7,246,256,84,-1,0,0,0,52429
453,0,17,0,0,0,0,7,246,256,84,-1,1,0,0,52429
454,11,20,49152,0,32768,32768,7,246,256,84,-1,1,0,0,52429
455,2,10,0,0,32768,0,7,246,256,84,-1,1,0,0,52429
456,10,24,49152,0,32768,0,7,246,256,84,-1,1,0,0,52429
457,6,4,0,9830,32768,0,7,246,256,84,-1,1,0,0,52429
458,8,25,49152,0,0,0,7,246,256,84,-1,1,0,0,52429
459,4,5,0,9830,0,0,7,246,256,84,-1,1,0,0,52429
460,12,13,49152,9830,0,0,7,246,256,84,-1,1,0,0,52429
461,3,1,0,0,32768,32768,7,246,256,84,-1,1,0,0,52429
462,2,8,0,0,32768,0,7,246,256,84,-1,1,0,0,52429
463,14,15,49152,9830,32768,0,7,246,256,84,-1,1,0,0,52429
464,7,25,0,9830,32768,32768,7,246,256,84,-1,1,0,0,52429
465,9,6,49152,0,0,32768,7,246,256,84,-1,1,0,0,52429
466,4,17,0,9830,0,0,7,246,256,84,-1,1,0,0,52429
467,11,24,49152,0,32768,32768,7,246,256,84,-1,1,0,0,52429
468,11,27,49152,0,32768,32768,7,246,256,84,-1,1,0,0,52429
469,12,9,49152,9830,0,0,7,246,256,84,-1,1,0,0,52429
470,1,29,0,0,0,32768,7,246,256,84,-1,1,0,0,52429
471,9,17,49152,0,0,32768,7,246,256,84,-1,1,0,0,52429
472,4,27,0,9830,0,0,7,246,256,84,-1,1,0,0,52429
473,2,16,0,0,32768,0,7,246,256,84,-1,1,0,0,52429
474,7,27,0,9830,32768,32768,7,246,256,84,-1,1,0,0,52429
475,12,8,49152,9830,0,0,7,246,256,84,-1,1,0,0,52429
476,5,21,0,9830,0,32768,7,246,256,84,-1,1,0,0,52429
477,14,7,49152,9830,32768,0,7,246,256,84,-1,1,0,0,52429
478,4,14,0,9830,0,0,7,246,256,84,-1,1,0,0,52429
479,11,2,49152,0,32768,32768,7,246,256,84,-1,1,0,0,52429
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